Breaking through EDS limitations: A study on using WDS for silicon wafer contaminant detection

Introduction

Energy dispersive x-ray spectroscopy (EDS) is widely used in silicon (Si) semiconductor wafer inspection for the identification of surface defects and contaminants due to the fast and detailed elemental analysis it provides. Common elements found in contaminant particles include strontium (Sr) and yttrium (Y) from high-k dielectrics, as well as tungsten (W) and tantalum (Ta) from metal plugs and interconnects. In bulk samples, modern EDS detectors typically can resolve (or deconvolve) the signal from these elements from the Si K signal. However, under typical analysis conditions used in wafer inspection, the electron beam penetrates through contaminants, generating a small signal from the contaminant of interest and a much stronger Si K (1.740 keV) signal from the wafer itself.

When measured with an EDAX Octane Elite Super EDS detector (nominally 125 eV resolution) at a 5 kV accelerating voltage, the Si K peak exhibits a full width half maximum (FWHM) of 80 eV but full width tenth maximum (FWTM) approaching an experimental value of 200 eV when taking the Si Kß contribution into account (Figure 1a outline spectrum). The broad FWTM Si peak obscures the common contaminant peaks including Sr and Y L, and W and Ta M lines (1.806, 1.922, 1.774, and 1.709 keV, respectively) reducing the peak-to-background ratio significantly and making these elements extremely hard to detect during wafer inspection. In contrast, wavelength dispersive x-ray spectroscopy (WDS) offers superior energy resolution and a better peak-to-background ratio, enabling the separation of the Si Kα and (weak) W Mα peak from the contaminant-on-silicon sample, whereas EDS could not (Figure 1a solid spectrum). In this study, we explore the best practices for identifying contaminants on the surface of silicon wafers using WDS.

Figure 1. a) EDS (red outline) and WDS (solid cyan) spectra overlay of 3 nm W film on a Si wafer using 5.0 keV accelerating voltage. b) WDS reduced scan spectrum of W Mα using 1s dwell time. The background is indicated by the red line.

Methods and materials

To simulate a contaminant-on-silicon sample, a 3.0 nm thick W film was deposited on a Si wafer using a Gatan PECS™ II system. EDS and WDS point analyses were performed simultaneously using an EDAX Octane Elite Super EDS detector and an EDAX Lambda Plus WDS detector in a field emission scanning electron microscope (SEM). Accelerating voltages ranging from 3.0, 5.0, 10.0, and 15.0 kV were tested to determine the best voltage. The beam current was maintained at 5 nA for all voltages, consistent with the range of beam currents typically used for wafer inspection with EDS. Rapid identification of contaminants is critical in wafer inspection, so WDS reduced scans were designed around the W Mα using 6 background channels and 9 signal channels to minimize scan time. A linear background was calculated from two background positions, and net counts were determined (Figure 1b). Dwell times of 0.5, 1, and 5 s/channel and a step size of 1 eV/channel were tested to determine the minimum time needed for W to be detected with statistical certainty by WDS in this test sample.

Figure 2. Monte Carlo Simulation of electron beam and 3 nm W film on a Si wafer interaction at 3.0, 5.0, 10.0, and 15.0 kV accelerating voltage (left to right): top row) electron trajectory, the vertical scale is 2.5 µm for all, bottom row) energy deposition, the vertical scale is marked for each graph. [1]

Results and discussion

Simulations of the electron beam-sample interaction using CASINO [1] showed that as the accelerating voltage increased from 3.0 kV to 15.0 kV, the electron penetration depth increased from approximately 150 nm to 2 μm into the Si wafer, with a significantly reduced number of electrons exciting x-rays from the 3 nm thick W film (Figure 2). Experimental results confirmed that the W Mα peak-to-background ratio decreased as the accelerating voltage increased at all dwell times (Figure 3). Additionally, variations in the peak-to-background ratio at a given accelerating voltage diminished with higher counting statistics at the increased accelerating voltage. The statistical significance of the W Mα peak was confirmed at 3.0, 5.0, and 10.0 kV for all dwell times, with the highest peak-to-background ratio of 3.0 achieved at 3.0 kV with a 1 s dwell time. At a 0.5 s dwell time, a peak-to-background ratio of 2.7 was still achieved, with the scan time reduced from approximately 15 s to 7.5 s. At 15.0 kV, the W Mα peak was not statistically significant due to limited electron interaction with the W film and consequently low W x-ray generation.

W Ma peak-to-background ratio as a function of accelerating voltage. The colors represent different dwell times.
Figure 3. W Mα peak-to-background ratio as a function of accelerating voltage. The colors represent different dwell times.

Conclusion

This study demonstrates that WDS is a viable technique for identifying contaminants in wafer inspection applications that cannot be addressed by EDS alone. The superior energy resolution of WDS can be used to identify sub 10 nm contaminants that are difficult to separate by EDS due to peak overlaps arising from the broad tail of the strong Si K peak. We have shown that W can be detected with statistical significance from 3.0 to 10.0 kV in approximately 7.5 s at 5 nA beam current, in line with EDS data collection conditions typically used for Si wafer inspection. Thus, WDS can be combined with EDS to provide an excellent solution for Si wafer contaminant detection under challenging conditions.

Reference

1. Page officielle de I’application Casino: Monte Carlo Simulation of Electron Trajectory in Solids, https://casino.espaceweb.usherbrooke.ca/ (accessed March 3rd, 2025)